The U.S. Department of Commerce has entered negotiations to invest up to $300 million in advanced packaging research projects in Georgia, California and Arizona to accelerate the development of technologies essential to the semiconductor industry.
The expected recipients are Absolics Inc. in Georgia, Applied Materials Inc. in California and Arizona State University in Arizona. Up to $300 million in federal funding will be paired with additional investments from the private sector, bringing the expected total investment across all three projects to over $470 million.
Most Read on Manufacturing.net
These investments represent efforts in advanced substrates. Advanced substrates are physical platforms that allow multiple semiconductor chips to be assembled seamlessly together, enable high-bandwidth communication between those chips, efficiently deliver power and dissipate unwanted heat.
The advanced packaging enabled by advanced substrates translates to high performance computing for AI, next-generation wireless communication and more efficient power electronics. Such substrates are not currently produced in the U.S. but are foundational to establishing and expanding domestic advanced packaging capability.
The proposed projects are:
- Absolics, Inc. in Covington, Georgia: Absolics has been recognized as the recipient in the glass materials and substrates areas, with up to $100 million in potential funding. The company aims to build a glass-core packaging ecosystem. In addition to developing the SMART Packaging Program, Absolics and their partners, is planning to support education and workforce development efforts by bringing training, internship and certification opportunities into technical colleges, the HBCU CHIPS Network and Veterans programs.
- Applied Materials in Santa Clara, California: Applied Materials, along with a team of 10 collaborators, is working on developing and scaling a silicon-core substrate technology for next-generation advanced packaging and 3D heterogeneous integration. Applied’s silicon-core substrate technology has the potential to advance America’s leadership in advanced packaging and help catalyze an ecosystem to develop and build next-generation energy-efficient artificial intelligence and high-performance computing systems in the US. In addition, Applied Materials’ education and workforce development plan is designed to strengthen the training and internship pipeline in the U.S. between state universities and the semiconductor industry.
- Arizona State University in Tempe, Arizona: Arizona State University will aim to develop the next generation of microelectronics packaging through fan-out-wafer-level-processing (FOWLP). At the heart of this initiative is the ASU Advanced Electronics and Photonics Core Facility, where researchers are exploring the commercial viability of 300 mm wafer-level and 600 mm panel-level manufacturing, a technology that does not exist in as a commercial capability in the U.S. today. ASU will establish an interconnect foundry that connects advanced packaging and workforce development programs with semiconductor fabs and manufacturers. ASU’s education and workforce development efforts bring industry-relevant training such as train the trainer, microcredentials and quick start programs for working professionals. Inclusion of the HBCU CHIPS network and the National Center for American Indian Enterprise Development is integral to their workforce development plan.
Click here to subscribe to our daily newsletter featuring breaking manufacturing industry news.